https://k155la3.blog/tags/chisel/ Recent content in chisel on K155LA3 Hugo -- gohugo.io en-us Mon, 04 Apr 2022 00:00:00 +0000 https://k155la3.blog/2022/04/04/tensil-tutorial-for-yolo-v4-tiny-on-ultra96-v2/ Mon, 04 Apr 2022 00:00:00 +0000 https://k155la3.blog/2022/04/04/tensil-tutorial-for-yolo-v4-tiny-on-ultra96-v2/ Introduction This tutorial will use Avnet Ultra96 V2 development board and Tensil open-source inference accelerator to show how to run YOLO v4 Tiny–the state-of-the-art ML model for object detection–on FPGA. The YOLO model contains some operations that Tensil does not support. These operations are in the final stage of processing and are not compute-intensive. We will use TensorFlow Lite (TF-Lite) to run them on the CPU to work around this. We will use the PYNQ framework to receive real-time video from a USB webcam and show detected objects on a screen connected to Display Port. https://k155la3.blog/2022/03/13/tensil-tutorial-for-pynq-z1/ Sun, 13 Mar 2022 00:00:00 +0000 https://k155la3.blog/2022/03/13/tensil-tutorial-for-pynq-z1/ Introduction This tutorial will use the PYNQ Z1 development board and Tensil’s open-source inference accelerator to show how to run machine learning (ML) models on FPGA. We will be using ResNet-20 trained on the CIFAR dataset. These steps should work for any supported ML model – currently all the common state-of-the-art convolutional neural networks are supported. Try it with your model! We’ll give detailed end-to-end coverage that is easy to follow. https://k155la3.blog/2022/03/06/tensil-tutorial-for-ultra96-v2/ Sun, 06 Mar 2022 00:00:00 +0000 https://k155la3.blog/2022/03/06/tensil-tutorial-for-ultra96-v2/ Introduction This tutorial will use the Avnet Ultra96 V2 development board and Tensil’s open-source inference accelerator to show how to run machine learning (ML) models on FPGA. We will be using ResNet-20 trained on the CIFAR dataset. These steps should work for any supported ML model – currently all the common state-of-the-art convolutional neural networks are supported. Try it with your model! We’ll give detailed end-to-end coverage that is easy to follow. https://k155la3.blog/2020/10/09/conways-game-of-life-on-fpga/ Fri, 09 Oct 2020 00:00:00 +0000 https://k155la3.blog/2020/10/09/conways-game-of-life-on-fpga/ When learning a new programming language, I like having a well defined yet non-trivial problem to solve. Conway’s Game of Life (GoL) fits this definition. It has enough depth to uncover various tradeoffs. So naturally, when I picked up Chisel hardware description language (HDL), I wanted to build Game of Life in FPGA. It turned out to be a lot more interesting than in software. This post will follow my progress from writing Chisel and Verilog code to running GoL on Digilent Arty A7 and seeing live patterns on a VGA screen.